Aaron E. Baranoff
www.baranoff.com
6 Santa Nella, Rancho Santa Margarita, California 92688
Cell: 949-795-7309 Email:
aaron@mataitech.com
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Professional Summary
I have over twenty four years of experience leading
and growing in the software and firmware industry specializing in
communications, embedded systems, firmware, drivers, real-time, DSP and other
applications software research and development, additionally I have ASIC and
FPGA development experience. I have spent most of the time working right at the
interface between software and hardware and helping to improve the products I
have been involved with by improving both software and hardware and leveraging
each of their strengths. I am an embedded
software engineer as well as being very at prolific ASIC and FPGA verification,
co-simulation, design and debug. I am
very good at leveraging all of my experience from across my skills to succeed
in what ever project is put in front of me which includes 12 years as a technical
lead or manager. I contract in support of MataiTech.
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Education
Rutgers University, BA: August, 1988 Major: Computer Science (Science-Math Specialty)
University of California, Irvine: December, 2002: Certificate
of Specialized Studies in Advanced Digital Systems Engineering
Oregon Graduate Institute School of Science & Engineering,
Windows Driver Model for Windows 2000/XP: July 2002
Georgia Tech, DSP for
Practicing Engineers: November 2001
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Job
Experience
2004
to Present
Co-Founder, MataiTech LLC – Rancho Santa Margarita,
California, I
contract in support of MataiTech and work directly on its internal products as
well as manage day to day engineering activities. MataiTech does custom
firmware, ASIC/FPGA design and verification as well as our own software product
NAUET. NAUET is targeted to the embedded market place and the ASIC and FPGA
industry using SPIRIT IP-XACT. I did the initial work on our first software
product called NAUET and manage its development. I personally designed the
import engine importing from Verilog and VHDL to IP-XACT and did the initial
coding for the code generation portions of the software including, Verilog,
VHDL, SystemC and C/C++ and continue to add more features to the product. I personally put in place most of the
engineering infrastructure and developed and signed our first clients and setup
our first technology licenses. I am actively involved with all aspects of business
development, coding C/C++ and Verilog and team development as well as ongoing
business activities. I also developed the initial engineering infrastructure as
well as establish the company and the website, email and version control all
within a few weeks of starting the company. I created the initial architect of
several designs M1000 and M2000 and setup the development environment and did
all the initial Verilog coding as well as 3rd party IP integration. I
also have done RTOS porting and development and started work on many of our
contracts. I actively contribute to software code as well as FPGA and ASIC
design. I licensed C/Verilog co-simulation technology which I personally wrote.
The co-simulation environment I created used the existing Modelsim environment
and allowed C code drivers to be tested against the simulation of the chip
prior to tape-out. Now the co-simulation
environment works with ModelSim, VCS and Veritak and can work under Windows or
Linux. Contracts I have personally done the primary engineering on included
XSCALE boot code, IR drivers and a SCSI target driver for a scanner device as wells
as various board bring ups and hardware verification and debug. Additionally,
for a client I developed a FPGA which includes FEC (Forward Error Correction)
100/10 Ethernet FPGA with I2C slave, line quality monitoring. I also designed IP
for encryption (AES128) and customized it for several customers. Other
contracts included developing tests for an implantable medical device, ASIC and
FPGA verification, validation and debug. In addition, I developed business
partnerships with many local, national and international companies and have
patents pending on several key technologies for MataiTech. I filed the provisional
patents and helped others do the same for the company.
2003
to Present
Part-time
Instructor, University of California Irvine – Irvine, California (in parallel with other
employment on evenings and weekends), I developed and am teaching two courses for
UCI extension’s Embedded System Technologies Certificate, “C for Embedded
Systems” and “Writing Portable Device Drivers”.
The “C for Embedded Systems” jump starts students who ‘C’ experience may
not be strong enough to get them going in the Embedded Systems program at UCI.
The “Writing Portable Device Drivers” takes students past just making a single
point solution to writing device drivers in a way where most of the code can be
reused across multiple platforms. This course also goes into reading datasheets
and what portability means in a device driver. The “Writing Portable Device
Drivers” course goes from datasheet to code. The material for these courses has
been developed from my many years of experience in helping to develop and lead
engineers. In addition to teaching these courses on campus at in Irvine I have
taught them for UCI at other locations and created and taught a combined
version of “C for Embedded Systems” and “Writing Portable Device Drivers” for
UCI for their on and off campus special training programs as well as modified
the “C for Embedded Systems” course and created an online version. Most
recently I designed and taught anoth couse “Getting Systems and Hardware
Working: Co-Development and Co-Debug” another course on hardware/ software
co-simulation.
2003
to Present
Advisory
Committee Member, University of California Irvine – Irvine, California (in
parallel with other employment on evenings and weekends), I advise UCI extension, helping to guide their Embedded Systems
Engineering certification program. I help in defining and expanding the program
while making sure the program meets the needs of the business and community.
2003
to 2004
Principal Engineer, Xiran Division of SimpleTech (Division Shutdown) – Irvine, California , I was a lead for initial device bring up
and initial diagnostics from the ASIC group and was responsible for making the
transition from the ASIC group to software group go smoothly. Helped in developing
the group and contributed to improving the Direct Path product line. I cut simulation time in nearly in half
within two weeks of starting at the company. I developed and implemented the
co-simulation environment for the benefit of the ASIC development group and the
software group while allowing for improved test coverage with shorter test
development times. I actively contributed code for the on chip firmware,
diagnostics and Verilog code to the projects of was involved with. I also was actively
involved with code quality improvement with both the hardware and software
groups and trying to identify performance bottle necks as well as architected
and implemented hardware and software solutions to these bottlenecks. I was
heavily involved with test automation development and making sure those tests
rolled from simulation into the lab on the prototype FPGA and then ASIC. With
this system most of the tests rolled right into the lab without a hitch and
many problems were caught prior to tapeout.
2002
to 2003
Senior Staff Systems Engineer (Software Lead), TDK Semiconductors (division sold to
Golden Gate Capital in 2005) – Irvine, California, I was technical lead for
software and systems development of all networking products. Primary
responsibilities include software development for the Ethernet MAC/PHY
products. I developed and lead the development of Windows and Linux drivers as
well as embedded drivers for VxWorks, OS20 and other real time operating
systems. In addition to software development work, I developed Verilog test
benches for the several products and contributed to the chip design for several
products and their test boards. Verilog developments included a generic
register and memory test bench that shared a common control file with a C
version of the register and memory test so the chip under test could be
verified both before and after production. Responsibilities included building
up the systems group for the network products and building a software
infrastructure including tools and equipment. I have also been training the
whole software department on writing portable device drivers as well as on
VxWorks and version control. I have personally written VxWorks, OS20, and Linux
drivers for TDK’s products as well as support the non-networking product
development as needed. I have also done some maintenance work on Windows
2000/XP drivers. In addition writing code and managing software developments I
have helped to locate several hardware issues and saved the company hundreds of
thousands of dollars in tape-out costs I actively contribute to the hardware
(ASIC) development by via direct contributions to the designs as well helping
on architectural issues in balancing software versus hardware needs. Additionally
I developed two test FPGA used to debug and test ASICs.
2000
to 2002
Core Systems Software Manager, Accelerated Networks (merged with Occam Networks) - Moorpark, California. Managing the firmware, boot ROMs, manufacturing
diagnostics and DSP software development. I was responsible for all cross
platform hardware interfaces and managed all the personnel to make that happen.
I had as many as nine direct reports. I had both responsibilities for
day-to-day management as well as technical management. Under my management we
had improved software quality and performance on both our IAD and MSAP product
lines. Despite some poor stock market performance and employee turnover and
layoffs, my group had no turnovers and continued to be productive.
Responsibilities had also included management of several board developments
(including the MSAP’s Channelized DS3 card), which included both new hardware
and the associated software. Highlights included improving our IAD Ethernet
traffic performance by nine fold while halving the CPU utilization (I was
personally involved with the driver redesign and reorganizing the hardware
software balance as well as managing the others involved) and major voice
quality improvements across all of our products (I was personally involved with
many of the code changes as well as managing the others involved). In improving the voice quality I personally
worked on reduced the DSP CPU utilization by about 20% while mentoring a junior
engineer and teaching him about code optimization. This optimization allowed us
more to add features to the DSP while improving the compressed voice quality.
On the channelized DS3 card I was responsible for initial board bring up. I
ported the several of the drivers including the IMA drivers, the various
framers, wrote some of the board support package. And I also managed the rest
of the diagnostic ROM development and boot ROM development. At the same time I
actively worked with one of my engineers at doing an RTOS update on the IAD
product line. I managed the tool roll out and the transition to the updated
code base.
Group Lead of MSAP
Software, Accelerated Networks - Moorpark, California. I was directly responsible
for stabilizing the low level code on the MSAP product line. Under my
leadership we fixed many long-standing software issues with our MSAP product
lines. These items included continuing the work I started on improving the AAL5
performance. My personal highlights including improving our products ATM
shaping and policing characteristics. Specifically making the SAR more
stringently comply with traffic profile requests.
Principal Member of the
Technical Staff, Accelerated Networks - Moorpark, California. I performed as a technical
lead for both a software and firmware group. Actively involve with both
maintenance and new development. I was
responsible for overhauling many of Accelerated Networks drivers. In addition
to my other responsibilities I volunteered to take a lead roll on improving the
software quality from the ground up. Reviewed each low-level driver and
personally fixed or planned the repair of each driver. This is in addition to
development of new drivers as well as ongoing product maintenance. These
drivers included SARs and Ethernet on both the MSAP and IAD product lines.
1995
to 2000
Senior Software
Development Engineer, PMC-Sierra (Maryland) (formally IgT – division
shutdown in 2003) - Gaithersburg, Maryland. I was technical lead on
developing PMC-Sierra's long-term business plan for software. I also continued
develop software for the AAL1 SAR (Aal1gator).
I developed the packet drivers for PMC’s frame relay chips (FREEDM-NG).
On the FREEDM-NG chip I developed one driver that supported all four variants
of the chip. I then supported the driver through its early chip respins.
Additional responsibilities have included pre and post sales support. I worked
with customers to make the transition from IgT to PMC as painless as possible.
Other involvements have included expanding the use of automated testing of both
hardware and software. In addition I managed contractors for the development of
other drivers such as PMCs next generation policing and shaping chips.
Senior Software
Engineer, Integrated Telecom Technologies (IgT) - Gaithersburg, Maryland. I performed as technical
systems and software lead on the development of much of IgT's software. This
software includes the management of the ATM switch fabric and the routing
within it. Other developments have included being the primary developer and
technical lead for many of IgT's other drivers including IgT's highly
successful AAL1 SARs, many UNI chips, UPC chips and others. I am quiet familiar
with ATM networking and its complexities such a traffic management, this while
staying close to the hardware. I was also
the primary point of contact for IgT’s technical support and sales for the ATM
software product line. I help to answer their questions as well as those of the
customers. I developed a simple connection administration and control (CAC)
system to act as both a demo and example to our customers thereby reducing the
number of support calls. My responsibilities included project and product
planning, management of technical projects. In addition I have been out to
customers to market, do technical support and field engineering for IgT’s
software and hardware. Software developments also included power on self-test.
My highlights have included playing a large part in taking IgT from having no
software to making software a critical part of is business plans as well as
developing a good interface and between the software development and the ASIC
development teams. I was also actively involved with mentoring less experienced
engineers.
1990
to 1995
Software
Engineer, Telecommunications Techniques Corporation (TTC) (now Acterna) - Cept Telecom
Division, Germantown, Maryland. I performed as Engineering Product Manager for two
telecommunications testing products. I acted as principal software engineer
and/or Project Manager on many new product developments and enhancements. These
developments have me working closely with electrical and test engineering as
well as manufacturing and marketing. Also I have acted as lead in automating
TTC's software testing. I have written an application note and taught several
product courses. I was also the expert in the use of PCs for development of
products and I was the software expert on Xilinx, CCITT performance analysis
standards, and data compression. My engineering highlights have included such
things as designing, implementing, testing, and performing on site demos to customers
of a 1 µS round trip delay measurement system in the Interceptor product line
software without adding any additional hardware costs. Other highlights also
included developing the CCITT M.2100 (M.550) and G.821 performance analysis
software. This implementation offers simultaneous performance analysis at all
valid rates and was designed to be portable to all Interceptor products as well
as any other products with similar features within TTC. This was all while
gaining International and US telecommunications expertise.
1983
to 1990
Programmer -
E-Systems,
Melpar Division (now Raytheon), Falls Church, Virginia. Perform software
research and development, specializing in real-time device drivers and systems,
including network and communications software. Perform as co-system
administrator for UNIX and XENIX systems.
I acted both as a lead programmer and co-programmer on several DOD
projects.
Independent
Programmer / Consultant – miscellaneous small companies (including Strobic Air), specializing in working with
small to mid-size companies helping to setup systems and write software. Specialize in software for scientific,
engineering and real-time applications. Consulting and purchasing agent for
hard to find computer equipment or supplies. I developed systems and software
ranging from banking and financial support software to engineering analysis of
ventilation equipment systems.
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Computer
Language Experience
C, some C++, several Assembly languages (I960, x86,
68xxx, PPC, TMS320C5XXX and more), Verilog, Verilog PLI, VHDL, System C and
others.
Hardware
Experience
PCs , many in-circuit and JTAG emulators, many logic
analyzers, Xilinx (XST) and Altera (Quartus).
Operating
System Experience
MS-Windows (all flavors), Linux, VRTX, VxWorks, OS20,
Tornado, pSOS, TI BIOS and others.
Additional
Information
IEEE Computer Society Member, ACM Member